Low Noise Amplifiers (LNAs) are typically used in communication transceivers for the amplification of weak electrical signals. Two of the main concerns associated with the design of amplifiers utilized for low noise radio frequency (RF) amplification are: (1) minimization of noise added to an electrical signal processed by the amplifier; and (2) achieving maximum power transfer between a source producing the electrical signal and the amplifier.
The noise added to a signal received by an amplifier results in a degradation of the signal-to-noise ratio (S/N) at an output of the amplifier. A figure of merit for the amount of noise added by the amplifier is the ratio of the S/N at an input of the amplifier to the S/N at the output of the amplifier. This ratio is commonly referred to as a Noise Factor (F) of the amplifier, and is used to calculate a Noise Figure (NF) of the amplifier.
To achieve maximum power transfer between a source and an amplifier, the input impedance of the amplifier should equal a complex conjugate of the source output impedance. In the case where the output impedance of the source is real, the input impedance of the amplifier should also be real. Nonetheless, for maximum power transfer between the source and the amplifier, the output impedance of the source and the input impedance of the amplifier should be equal. This is commonly referred to as impedance matching or power matching.
FIG. 1 illustrates a conventional common-source LNA 100. The LNA 100 includes a transistor 102 having a drain applied with a supply voltage Vdd through a first inductor 104. An input RF signal (RF In) is applied to a gate of the transistor 102 through a second inductor 106, while an RF signal (RF Out) output from the LNA 100 is taken from the drain of the transistor 102. The gate of the transistor 102 is further connected via a resistor 107 to a diode-connected transistor 108 that forms a current mirror circuit with transistor 102. A source of the transistor 102 is connected to a ground 110 via a third inductor 112. The current mirror circuit 108 is also coupled to ground 110 via the third inductor 112. This arrangement establishes a predetermined bias current in transistor 102. Operation of the illustrated LNA 100 is well known by those skilled in the art, where the input RF signal is amplified according to the characteristics of transistor 102 and the matching networks, including three inductors 104, 106 and 112
FIG. 2 illustrates a conventional common-gate LNA 200. The LNA 200 includes a first inductor 202 having a first terminal that receives an input RF signal (RF In) and a second terminal connected to a ground 204. A capacitor 206 is connected in parallel between the first terminal of the first inductor 202 and the ground 204. A second inductor 208 is connected between a drain of a transistor 210 and a supply voltage Vdd. The interconnection between the second inductor 208 and the transistor 210 forms an output node for supplying an output RF signal (RF Out). Characteristic of a common-gate LNA, the gate of the transistor 210 is connected to a bias voltage source 212. Operation of the illustrated common-gate LNA 200 is also well known by those skilled in the art.
When an LNA is manufactured, such as the LNAs 100 and 200 illustrated in FIGS. 1 and 2, respectfully, the active components of the amplifier are typically installed on-chip. The processes used to manufacture an LNA may include Complementary Metal Oxide Semiconductor (CMOS) techniques, which makes the LNA particularly attractive for use in portable electronic devices.
Unfortunately, on-chip inductors used in conjunction with LNAs may have poor performance. Further, the use of on-chip inductors increases chip area of the LNAs. This usually increases cost, particularly for multi-standard products.